1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor, and more particularly, to a method of manufacturing a semiconductor device having a high-k dielectric thin layer formed by an interfacial reaction.
The present invention is derived from a project entitled “Future Technology Researches in the Fields of Information and Telecommunications [2200-S]” conducted as an IT R&D program for the Ministry of Information and Communication (Republic of Korea).
2. Discussion of Related Art
In a silicon-based field effect transistor (FET), it is necessary to form a gate with a linewidth of several tens of nm in order to increase integration density. To obtain the gate with a linewidth of several tens of nm, the physical thickness of a conventional gate insulating layer should be reduced to 1 nm or less. In this case, however, the number of electrons tunneling directly through the gate insulating layer increases sharply, thereby increasing a leakage current of the silicon-based FET.
Typically, a gate insulating layer of an FET is formed of SiO2, which is obtained using a thermal oxidation process and known as a very physicochemically stable material. However, as stated above, although it is desired that the thickness of an SiO2 gate insulating layer be reduced to increase the integration density of an FET, when the SiO2 gate insulating layer has a predetermined thickness or less, a leakage current characteristic of the FET deteriorates, thus degrading reliability of the FET. Therefore, it is theoretically calculated that the most appropriate physical thickness of the SiO2 gate insulating layer is about 1.6 nm.
In order to overcome the drawbacks of the foregoing SiO2 gate insulating layer, a high-k dielectric layer has been proposed. Generally speaking, a high-k dielectric material is a material having a higher dielectric constant than the dielectric constant (k=3.9) of SiO2. High-k dielectric materials on which a vast amount of research has recently been conducted include Group IV metal oxides, such as HfO2 and ZrO2, and rare-earth element oxides, such as La2O3, Gd2O3, and Y2O3. The foregoing oxides have high dielectric constants, good thermal stability, and wide band offsets to silicon.
The most typical method of manufacturing a high-k dielectric thin layer is an atomic layer deposition (ALD) method disclosed in Korean Patent Publication No. 10-2005-0072087. A method of manufacturing a high-k dielectric thin layer using an ALD technique involves controlling the thickness of the high-k dielectric thin layer by alternately injecting a precursor and a co-reactant in a pulse type into the surface of a grown layer. However, according to the ALD method, it is very difficult to obtain a precursor appropriate for a high-k dielectric thin layer to be manufactured. Moreover, a large amount of silicon dangling bond is formed at an interface of the high-k dielectric thin layer manufactured using the ALD method, thereby increasing the density of interfacial state.
Also, Korean Patent Publication No. 10-2006-0059847 teaches a method of manufacturing a high-k dielectric layer using a chemical reaction, such as hydrolysis. Specifically, a solid solution with a Perovskite structure based on barium lanthanide poly-titanate may be formed using a chemical reaction, such as hydrolysis. The solid solution may include at least one of BaLn2(Ti1−xMx)4O12, BaLn2(Ti1−xMx)3O10, BaLn2(Ti1−xMx)2O8, and (Ba,Ln) (Ti1−x−yMxTay)O5 (Ln=La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Y; M=Zr, Hf; x, y=0˜1). The foregoing method is relatively simple and enables formation of a high-k dielectric layer in large quantities. However, a chemical reaction required for forming the high-k dielectric layer is inadequate for a typical process of manufacturing a silicon semiconductor device.